TB-NUCA: A Temperature-Balanced 3D NUCA Based on Bayesian Optimization
نویسندگان
چکیده
Three-dimensional network-on-chip (NoC) is the primary interconnection method for 3D-stacked multicore processors due to their excellent scalability and interconnect flexibility. With support of 3D NoC, non-uniform cache architecture (NUCA) commonly used organize last-level (LLC) its high capacity fast access latency. However, owing layered structure that leads longer heat dissipation paths variable inter-layer cooling efficiency, NoC experiences a severe thermal problem has big impact on reliability performance chip. In traditional memory-to-LLC mapping in NUCA, traffic load each node inconsistent with capability, causing hotspots. To solve above problem, we propose temperature-balanced NUCA mechanism named TB-NUCA. First, Bayesian optimization algorithm calculate probability distribution blocks order equalize temperature. Secondly, TB-NUCA designed. Finally, comparative experiments were conducted under random, transpose-2, shuffle patterns. The experimental results reveal that, compared classical (S-NUCA), can increase mean-time-to-failure (MTTF) routers by up 28.13% while reducing maximum temperature, average standard deviation temperature 4.92%, 4.48%, 20.46%, respectively.
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ژورنال
عنوان ژورنال: Electronics
سال: 2022
ISSN: ['2079-9292']
DOI: https://doi.org/10.3390/electronics11182910